1. Field of the Invention:
The present invention relates to a circuit for sorting data relating to a plurality of reference axes.
2. Description of Related Art:
There is known an image synthesizer for synthesizing image signals of an image to be displayed on CRT, based on the external information of that image. Such an image synthesizer is capable of not only synthesizing two-dimensional images but also three-dimensional images and currently used over a broad range of application, for example, in three-dimensional video games, simulators for various vehicles such as airplane and the like, computer graphics or CAD display.
In order to synthesize a three-dimensional image having a depth in real-time, the image synthesizer is required to high-speed sort image data of a three-dimensional object for each frame, based on the coordinates in the depth direction, that is, Z-axis data of the image.
It has been desired to develop a circuit for high-speed sorting three-dimensional data based on a predetermined reference-axis data, that is, Z-axis data.
In the past, the sorting was performed such that all the data were processed by sequentially comparing a Z-axis datum with the adjacent Z-axis datum within the data and re-arranging the Z-axis data on the result of each comparison.
Thus, many transfers of all the Z-axis data between memories must be repetitively. This raises a problem when the sorting should be performed at high speed.
As the number of Z-axis data to be processed increases, the sorting is correspondingly degraded in time and labor. If such a problem is to be overcome by the present technique, a computer having a relatively large capacity must be used. This leads to more complexity and increased cost in the entire sorting system.